Rambus recently introduced the industry's first complete DDR5 register clock driver (RCD), power management integrated circuit (PMIC), serial presence detection center (SPD Hub) and temperature sensor (TS) chipset designed for the next generation of DDR5 multi-ranking dual in-line memory modules (MRDIMMs) and registered dual in-line memory modules (RDIMMs). These innovative products will provide the perfect bandwidth and memory capacity for data center and AI workloads.
DDR5 DIMMs use new innovations and module architectures to increase memory bandwidth and capacity. Rambus offers the industry's first 5600 MT/s RCD and announces the 6400 MT/s DDR5 RCD, taking performance levels to the next level and meeting the need for more memory bandwidth for advanced workloads including HPC and AI/ML. AI training and inference processes require massive data transfers and high-speed memory systems to handle the increasing volume and complexity of data. Rambus' DDR5 solution enables fast access and reduced latency for AI applications in the cloud by providing higher memory bandwidth and capacity.
DDR5 RDIMM 8000 and the industry-standard MRDIMM 12800 share a common architecture and are compatible with server platforms. The DDR5 RDIMM 8000 chipset includes a Gen 5 RCD, PMIC5030, a serial presence sensing center, and a temperature sensor chip. The DDR5 MRDIMM 12800 chipset includes MRCD and MDB, as well as the same PMIC5030, SPD center, and TS chips used in the RDIMM 8000.
Figure: Rambus introduces the industry's first chipset for DDR5 MRDIMMs
The DDR5 MRDIMM 12800 features a novel and efficient module design that effectively interleaves the two data streams by multiplexing the two DRAM rows, allowing the host memory bus to operate at twice the data rate of the native DRAM device, thereby increasing bandwidth without altering the physical connectivity of the DDR5 RDIMM. This requires an MRCD to handle the two DRAM rows on alternating clock cycles, and an MDB to guide the data stream to and from the DRAM device correctly. Each DDR5 MRDIMM 12800 requires one MRCD and ten MDB chips to multiplex memory channels.
Sean Fan, COO of Rambus, said, "The huge demand for memory in AI and HPC requires us to continuously pursue higher performance through continuous innovation and technology leadership. With more than 30 years of high-speed signal integrity and memory system expertise, the Rambus Gen5 RCD, along with the next generation of MRCD, MDB, and PMICs, will be key chips in future generations of servers leveraging the DDR5 RDIMM 8000 and MRDIMM 12800. ”
In addition, Rambus' DDR5 chipset includes RCD, PMIC, SPD center, and TS chips for server DDR5 register DIMMs (RDIMMs), which are designed to deliver superior bandwidth, performance, and capacity. With over 30 years of experience in high-performance memory, Rambus is known for its Signal Integrity (SI)/Power Integrity (PI) expertise. This expertise enables the implementation of DDR5 memory interface chips that deliver superior performance and reliability for data center server RDIMMs.
Rambus' DDR5 solutions continue to push performance levels to meet market demands. Rambus offers the industry's first 5600 MT/s RCD and announces 6400 MT/s DDR5 RCD to further improve performance. As DDR5 technology continues to expand, Rambus continues to improve the performance of its DDR5 solutions to meet the demand for greater memory bandwidth for advanced workloads including HPC and AI/ML.
